Electronics (ECE) - MCQ Practice Questions

Which encoding scheme minimizes errors during binary-to-decimal conversion in digital systems?

In a state machine with 7 states, how many flip-flops are needed for the state register?

In a synchronous counter with n flip-flops, what is the maximum frequency at which the counter can operate?

In a Johnson counter with 4 flip-flops, what is the maximum count sequence length?

Which logic gate is used in a full adder to generate the carry output?

What is the setup time of a flip-flop?

In a 3-to-8 decoder, if the enable pin is active low and all select lines are 0, what will be the output?

In Gray code, how many bits change when transitioning from 5 (0101) to 6 (0110)?

A 32×8 ROM has how many address lines and data lines respectively?

A 4-bit Ripple Carry Adder has a total propagation delay of 12 ns. If each full adder stage has a propagation delay of 3 ns, what is the delay for carry propagation?

What is the main advantage of a Carry Lookahead Adder (CLA) over a Ripple Carry Adder (RCA)?

What is the maximum frequency of operation for a JK flip-flop with setup time 5ns, hold time 3ns, and propagation delay 8ns?

In a Mealy state machine, the output depends on which of the following?

In a 4-bit Binary Weighted DAC, what is the weight of the MSB compared to the LSB?

In Booth's algorithm for multiplication, what is the purpose of examining the last two bits (current and previous)?

How many AND gates are required to implement a 3:8 decoder?

In a synchronous counter design, what is the main advantage over an asynchronous counter?

Which of the following represents the canonical form of the Boolean expression for XOR gate?

In a Finite State Machine (FSM) with 7 states, what is the minimum number of flip-flops required?

What is the primary function of a Priority Encoder?