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Electronics (ECE) - MCQ Practice Questions

Practice free Electronics (ECE) multiple-choice questions with detailed answers and explanations. Perfect for competitive exam preparation.

400 questions | 100% Free

Q.1Medium

The truth table of which gate has odd number of 1s in output column for 2-input gate?

Q.2Medium

A combinational circuit with n inputs and m outputs is completely specified by:

Q.3Medium

What is the simplified form of the Boolean expression A + AB + ABC?

Q.4Medium

What is the Hamming distance between binary numbers 1011101 and 1001001?

Q.5Medium

Which of the following Boolean expressions represents the majority function for 3 inputs?

Q.6Medium

In a 4-bit binary counter, after state 1111, the next state is:

Q.7Medium

For a Karnaugh map of 4 variables, what is the minimum number of cells needed to cover all minterms?

Q.8Medium

What is the maximum frequency of a synchronous counter if each flip-flop has a propagation delay of 10 ns?

Q.9Medium

An asynchronous counter with n flip-flops counts from 0 to:

Q.10Medium

In Mealy machine, the output depends on:

Q.11Medium

In a synchronous counter design, what is the main advantage over asynchronous counters?

Q.12Medium

In Booth's multiplication algorithm, which sequence of multiplier bits requires the fewest operations?

Q.13Medium

What is the setup time in a flip-flop?

Q.14Medium

For a modulo-6 counter using JK flip-flops, how many flip-flops are required at minimum?

Q.15Medium

Which multiplexer configuration is used to implement any Boolean function with minimum gates?

Q.16Medium

A 4-bit binary subtractor using 2's complement method requires:

Q.17Medium

In a magnitude comparator for 4-bit numbers, if A > B, A = B, and A < B outputs are provided, what is the total number of output combinations possible?

Q.18Medium

What is the hold time in a flip-flop, and why is it critical?

Q.19Medium

In a cascaded 4-bit counter system where two 4-bit counters are connected, what maximum count value can be achieved?

Q.20Medium

Which encoding scheme minimizes errors during binary-to-decimal conversion in digital systems?