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Electrical Engg (EEE) - MCQ Practice Questions

Practice free Electrical Engg (EEE) multiple-choice questions with detailed answers and explanations. Perfect for competitive exam preparation.

670 questions | 100% Free

Q.181Easy

In a ripple counter with 4 flip-flops, what is the maximum count?

Q.182Easy

What is the primary advantage of CMOS logic over TTL logic in modern designs?

Q.183Easy

In a multiplexer with 8 input lines, how many output lines are present?

Q.184Easy

De Morgan's theorem states that (A·B)' equals:

Q.185Easy

A 4-bit binary counter requires how many flip-flops to count from 0 to 15?

Q.186Easy

Which logic gate produces a HIGH output only when all inputs are HIGH?

Q.187Easy

What is the minimum number of NAND gates required to implement a NOT gate?

Q.188Easy

In a J-K flip-flop, when J=1 and K=1, the output will:

Q.189Easy

A 3-to-8 decoder has how many output lines?

Q.190Easy

Which of the following is the correct relationship for setup time in sequential circuits?

Q.191Easy

A Karnaugh map with 5 variables requires a minimum of how many cells?

Q.192Easy

In a multiplexer circuit, if there are 16 output lines, how many select lines are required?

Q.193Easy

In a BCD (Binary Coded Decimal) counter, what is the maximum count value?

Q.194Easy

Which semiconductor technology provides the lowest static power consumption?

Q.195Easy

A combinational circuit has 6 input variables. The minimum number of rows required in its truth table is:

Q.196Easy

A 3-to-8 decoder is used in a digital system. How many AND gates with minimum inputs are required?