Electrical Engg (EEE) - MCQ Practice Questions

Which of the following Boolean expressions is equivalent to (A+B)·(A+C)?

In a 3-bit binary counter with initial state 000, after 9 clock pulses, the state will be:

Design a circuit using NAND gates only to implement NOR function. How many NAND gates are minimum required?

A decade counter counts from 0 to 9. To design a decade counter from a binary counter, how many flip-flops minimum are needed along with additional logic?

A full adder can be implemented using how many NAND gates minimum?

In a Gray code counter, consecutive counts differ by exactly:

In a synchronous counter design, all flip-flops receive the clock signal simultaneously. This arrangement primarily eliminates:

A Schmitt trigger input is used in digital circuits primarily to:

When implementing a 3-variable Boolean function using a 2-to-1 multiplexer instead of a 8-to-1, one variable must be:

What is the hold time constraint violation in sequential circuits?

Which digital logic family provides the best balance between speed and power consumption?

In a 4-bit BCD adder, what is the maximum sum that can be represented without requiring correction?

What is the primary function of a state machine in digital design?

In a 8-bit barrel shifter, how many control bits are required to specify any shift amount?

In a sequential logic circuit, metastability occurs when the input changes relative to the clock edge. How can this be minimized?

In asynchronous sequential circuits, what is the primary concern regarding state transitions?

In the context of digital signal processing, what is the Nyquist sampling theorem's requirement?

In a synchronous counter design using SR flip-flops with Karnaugh map minimization, which hazard is most critical in the implementation?

What is the setup time requirement for a D flip-flop in a shift register operating at 100 MHz clock frequency?