Electrical Engg (EEE) - MCQ Practice Questions

A synchronous counter differs from asynchronous counter in that:

In a 4-bit ripple counter, the maximum frequency that can be counted is limited by the:

A 3-to-8 decoder with active-low outputs has how many output lines at logic 0 when the input is 101?

In a Priority encoder, when multiple inputs are high simultaneously, which input gets priority?

A synchronous BCD counter counts from 0000 to 1001, then resets to 0000. This requires modification of a standard 4-bit counter using:

Which Boolean algebra theorem states that A + A·B = A?

The propagation delay in a synchronous counter is:

In Quine-McCluskey method, prime implicants are:

The hold time specification for a flip-flop ensures that:

In a 8-bit parallel-in serial-out (PISO) shift register, how many clock pulses are needed to output all data?

Which characteristic distinguishes CMOS gates from TTL gates in practical applications?

In a D flip-flop, the output Q follows the input D on the occurrence of which signal?

Which type of ADC provides the fastest conversion?

What is the output frequency of a decade counter (MOD-10 counter) when input frequency is 1 MHz?

The setup time of a flip-flop is defined as the minimum time during which the input must be stable:

Which of the following logic families has the highest power dissipation?

A 16:1 multiplexer requires how many select lines to uniquely identify each input?

In asynchronous (ripple) counters, the propagation delay issue leads to:

Which digital circuit is used to convert parallel data into serial form?

The Boolean expression A·B + A·B' can be simplified to: