What is the hold time of a flip-flop?
A 32:1 multiplexer can be constructed using how many 4:1 multiplexers?
Which of the following flip-flops is most suitable for frequency division applications?
In 2's complement representation, what is the range of numbers for an 8-bit system?
Which characteristic of CMOS logic makes it suitable for portable devices?
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How many address lines are required for a 4GB memory system?
In a priority encoder, what determines which input is encoded when multiple inputs are active?
What is the main advantage of Gray code over binary code in digital systems?
In a synchronous counter design, what is the primary advantage over asynchronous counters?
Which logic family has the highest noise margin among the following?
Which of the following represents the De Morgan's law correctly?
In an SR flip-flop, what happens when both S and R inputs are 1 simultaneously?
A Johnson counter (twisted ring counter) with n flip-flops produces how many unique states before repeating?
In FPGA design, what does LUT (Lookup Table) primarily function as?
What is the Fan-out limit of a TTL gate, and what does it signify?
What is the characteristic equation of a D flip-flop?
Which of the following correctly describes the difference between combinational and sequential logic?
What is the main purpose of tristate logic (three-state logic) in digital circuits?
In a 4-bit binary counter using JK flip-flops, if the propagation delay of each flip-flop is 10 ns, what is the maximum counting frequency?
In a Mealy state machine design for a sequence detector (detecting '101'), the output depends on:
