Electrical Engg (EEE) - MCQ Practice Questions

In an SR flip-flop, what happens when both S and R inputs are 1 simultaneously?

A Johnson counter (twisted ring counter) with n flip-flops produces how many unique states before repeating?

In FPGA design, what does LUT (Lookup Table) primarily function as?

What is the Fan-out limit of a TTL gate, and what does it signify?

What is the characteristic equation of a D flip-flop?

Which of the following correctly describes the difference between combinational and sequential logic?

What is the main purpose of tristate logic (three-state logic) in digital circuits?

In a 4-bit binary counter using JK flip-flops, if the propagation delay of each flip-flop is 10 ns, what is the maximum counting frequency?

In a Mealy state machine design for a sequence detector (detecting '101'), the output depends on:

A priority encoder with 8 inputs has the highest priority assigned to the MSB. If inputs I7=1, I5=1, I3=1, and all others are 0, what is the output?