Electrical Engg (EEE) - MCQ Practice Questions

Which of the following is a sequential logic circuit?

In a JK flip-flop, when J=1 and K=1, the next state will be:

What is the fan-out of a logic gate?

Which digital logic family has the highest speed of operation?

The number of logic levels required to represent 32 different states in binary is:

What is the main advantage of CMOS logic over TTL?

A 4-to-1 multiplexer has inputs A, B, C, D and select lines S₁, S₀. If S₁=0 and S₀=1, which input is selected?

In Karnaugh map simplification, a group of 8 adjacent cells eliminates how many variables?

What is the primary function of an encoder in digital electronics?

A synchronous counter differs from asynchronous counter in that:

In a 4-bit ripple counter, the maximum frequency that can be counted is limited by the:

A 3-to-8 decoder with active-low outputs has how many output lines at logic 0 when the input is 101?

In a Priority encoder, when multiple inputs are high simultaneously, which input gets priority?

A synchronous BCD counter counts from 0000 to 1001, then resets to 0000. This requires modification of a standard 4-bit counter using:

Which Boolean algebra theorem states that A + A·B = A?

The propagation delay in a synchronous counter is:

In Quine-McCluskey method, prime implicants are:

The hold time specification for a flip-flop ensures that:

In a 8-bit parallel-in serial-out (PISO) shift register, how many clock pulses are needed to output all data?

Which characteristic distinguishes CMOS gates from TTL gates in practical applications?