Electronics (ECE) - MCQ Practice Questions

In a 3-to-8 decoder, if the binary input is 101, which output line will be activated?

Which of the following logic gates has an output of 1 only when both inputs are different?

What is the Boolean expression for a 2-input NAND gate?

In a Multiplexer (MUX), how many select lines are required for an 8:1 MUX?

What is the maximum frequency of operation for a JK flip-flop with setup time 5ns, hold time 3ns, and propagation delay 8ns?

In a Mealy state machine, the output depends on which of the following?

What is the primary purpose of using parity bits in error detection?

In a 4-bit Binary Weighted DAC, what is the weight of the MSB compared to the LSB?

Which semiconductor memory loses its data when power is switched off?

In Booth's algorithm for multiplication, what is the purpose of examining the last two bits (current and previous)?

What is the truth table output for a D flip-flop when CLK = 1 and D = 1?

How many AND gates are required to implement a 3:8 decoder?

In a synchronous counter design, what is the main advantage over an asynchronous counter?

What is the output of a full adder when A=1, B=1, and Cin=1?

In a 8×4 RAM configuration, what do 8 and 4 respectively represent?

Which of the following represents the canonical form of the Boolean expression for XOR gate?

In a Finite State Machine (FSM) with 7 states, what is the minimum number of flip-flops required?

What is the primary function of a Priority Encoder?

In pipelined architecture, what does increasing the number of pipeline stages primarily result in?

How does the Kogge-Stone adder compare to the Ripple Carry Adder in terms of propagation delay for a 32-bit addition?